Job Description

Job Responsibilities:

• Design and verify hardware architectures for complex ASIC and FPGA-based systems.
• Develop and verify VHDL/Verilog RTL designs for high-throughput, low-power signal processing applications.
• Design, implement, and verify ASIC and FPGA solutions targeting Xilinx Virtex/Kintex 7 and/or UltraScale/UltraScale+ devices.
• Develop and maintain Vivado/ModelSim workflows for design, simulation, and verification.
• Develop digital circuits for signal processing applications.
• Integrate third-party IP into FPGA and ASIC designs.
• Perform board-level interface debugging and verification.
• Develop unit-level and system-level verification test cases.
• Work independently and as part of a team on complex ASIC designs and multi-FPGA emulation efforts.
• Develop new RTL modules with minimal supervision and document technical results.

Skills:

• Hardware Architecture Design and Verification
• VHDL/Verilog RTL Design and Verification
• ASIC/FPGA Design and Verification
• Xilinx FPGA Development
• Vivado/ModelSim
• Digital Signal Processing
• Signal Processing Digital Circuit Design
• Third-Party IP Integration
• Board-Level Interface Debugging and Verification
• Hardware Verification and Testing

Education/Experience:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Mathematics, Physics, or a related scientific/engineering field.
• 10+ years of experience in hardware and digital design.
• 10+ years of experience with digital circuit design.
• 10+ years of experience with FPGA hardware design using Xilinx Vivado.
• 10+ years of experience with Xilinx FPGA technologies.
• 10+ years of experience developing hardware verification plans.
• 10+ years of hardware design experience.
• 10+ years of VHDL/Verilog experience.
• 10+ years of ASIC design experience.
• 10+ years of ASIC verification experience.
• 5+ years of digital signal processing experience.
• 10+ years of Vivado software experience.
• Experience with SystemVerilog UVM.
• Experience working with Ethernet/SerDes IP.
• Experience with MATLAB programming.
• Experience with scripting languages such as Perl, Python, and C/C++.
• Experience in FPGA development for RF systems.
• Experience in FPGA development for Software Defined Radio platforms.
• C and/or other programming experience.
• Working knowledge of scripting languages.
• Experience integrating and debugging high-speed interfaces.

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